1. Field of the Invention
The present invention relates to a video signal processing apparatus used in a video tape recorder (VTR), a video disk player (VDP) and the like, for digitally processing a video signal using a memory.
2. Description of the Prior Art
Conventionally, VTRs and the like employ a video memory as a time axis correcting apparatus and a frame synchronizer.
FIG. 1 is a schematic block diagram of a conventional VTR apparatus. In this drawing, after a video signal has been A/D-converted by an A/D (analog-to-digital) converter 1 into a corresponding digital video signal, the digital video signal is written into a memory 2. Then, the digital video signal which has been written into the memory 2 is read out and D/A-converted into a corresponding analog video signal by a D/A (digital-to-analog) converter 3. The output derived from the D/A converter 3 is supplied to a replacing circuit 4. The function of the replacing circuit 4 is to replace a synchronizing (sync) signal (vertical synchronizing signal and horizontal synchronizing signal) of the video signal corresponding to the output from the D/A converter 3, with a reference sync signal generated from a sync-signal generating circuit 7. This implies such a sync-insert circuit in which, in order to reduce the memory capacity of the memory 2, no sync signal portion is written into the memory, but only the video period is written therein.
In any cases the video signal to which the reference sync signal has been added by the replacing circuit 4, corresponds to an output signal with a stable time axis.
It should be noted that a PLL (phase-locked loop) 5 produces a write clock whose phase is synchronized with the phase of the input video signal, and also an oscillator 6 produces a reference read clock.
In the above-described conventional apparatus, since the digital video signal is read out from the memory 2 in response to a stable reference clock, and furthermore the sync signal is replaced with a stable reference sync signal, time axis correction is carried out.
On the other hand, there are several sorts of reference sync signals to be generated by the sync-signal generating circuit 7, such as the horizontal sync signal, the vertical sync signal and the equalizing pulse. As a result, a large quantity of frequency dividing circuits are required which properly divide an oscillator output having a frequency of, for instance, Nf.sub.sc (symbol "N" denotes any integer, and symbol "f.sub.sc " represents a color sub-carrier frequency) provided by a crystal oscillator. Therefore, a total number of elements in the conventional apparatus is large.
Further, in a video signal recorded by a recently developed VTR, a time code, an address, an ID code and the like, which are referred to as a "VITC", have been recorded during a vertical flyback (retrace) period of this video signal. Also in a VDP, an address, a picture stop code and the like have been recorded. As a consequence, if the synchronizing signals of the vertical flyback period are replaced by the reference synchronizing signal in the conventional apparatus, these data will be lost. When the video signal from which these data have been lost is dubbed in another VTR, the lost data are not dubbed.